Biography
Jun Yin received the B.Sc. and the M.Sc. degrees in Microelectronics from Peking University (PKU) in 2004 and 2007, respectively, and the Ph.D. degree in Electronic and Computer Engineering (ECE) from Hong Kong University of Science and Technology (HKUST) in 2013. He has been with the State-Key Laboratory of Analog and Mixed-Signal VLSI (AMS-VLSI) of University of Macau (UM) since 2014, where he works currently as an Associate Professor.
Dr. Yin has co-authored more than 40 peer-reviewed Journal and Conference papers. He is serving as an Associate Editor for IEEE Transactions on Circuit and Systems I: Regular Papers and ELSEVIER Integration the VLSI Journal as well as a TPC member for European Solid-State Circuit Conference (ESSCIRC) and IEEE International Symposium on Circuits and Systems (ISCAS).
For detailed publications, please visit: https://www.fst.um.edu.mo/personal/junyin/
Professional Experience
- Associate Professor, State-Key Lab. of Analog and Mixed-Signal VLSI, University of Macau (Aug. 2020 – Present)
- Assistant Professor, State-Key Lab. of Analog and Mixed-Signal VLSI, University of Macau (July 2014 – Aug. 2020)
- Postdoctoral Fellow, State-Key Lab. of Analog and Mixed-Signal VLSI, University of Macau (Oct. 2013 – June 2014)
- Research Associate, Hong Kong University of Science and Technology (Apr. 2013 – June 2013)
Research Interests
- RF and mm-Wave CMOS integrated circuits
Teaching Experience
- ECEN 3019 – Introduction to Radio Frequency Circuits and Systems (B.Sc. Courses)
- ECEN7003 – Microelectronic Circuit Design (M.Sc. Courses)
- ELCE818 – Advanced Topics in Electrical and Computer Engineering (Ph.D. Courses)
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2020 Macao Science & Technology Award – Technological Invention – 1st Prize (Enabling Internet-of-Everything (IoE) Connectivity with Advanced Electronic Chips)
The Science and Technology Development Fund(FDCT)
Oct-2020 -
2018 Macao Science & Technology Award – Technological Invention – 2nd Prize (Analog and Mixed-Signal Integrated Circuit Technologies Enabling a Smart Macau)
The Science and Technology Development Fund(FDCT)
Oct-2018
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A 15.2-to-18.2GHz Balanced Dual-Core Inverse-Class-F VCO with Q-Enhanced 2nd-Harmonic Resonance Achieving 187-to-188.1dBc/Hz FoM in 28nm CMOS
2021 IEEE Asian Solid-State Circuits Conference (A-SSCC)
Session 12/ Paper 12.1
Nov-2021